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计时最短时间为100Hz，BASYS2 board,FPGA .zip
资料介绍
计时,最短时间为100Hz，BASYS2 board,FPGA 可以在7-Segment上显示时间.zip
部分文件列表
| 文件名 | 大小 |
| TimingTheWorld_Decimal/.lso | |
| TimingTheWorld_Decimal/_ngo/ | |
| TimingTheWorld_Decimal/_ngo/netlist.lst | |
| TimingTheWorld_Decimal/_xmsgs/ | |
| TimingTheWorld_Decimal/_xmsgs/bitgen.xmsgs | |
| TimingTheWorld_Decimal/_xmsgs/map.xmsgs | 1KB |
| TimingTheWorld_Decimal/_xmsgs/netgen.xmsgs | 1KB |
| TimingTheWorld_Decimal/_xmsgs/ngdbuild.xmsgs | |
| TimingTheWorld_Decimal/_xmsgs/par.xmsgs | 1KB |
| TimingTheWorld_Decimal/_xmsgs/pn_parser.xmsgs | 1KB |
| TimingTheWorld_Decimal/_xmsgs/trce.xmsgs | 2KB |
| ... | |
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